I. Field of the Invention
The present invention relates to a package structure. More particularly, the present invention relates to an electronic package structure.
II. Description of the Prior Art
Electronic package structures are formed by complicated package processes. Different electronic package structures have different electrical performances and capacities of heat dissipation, and therefore a designer may select an electronic package structure with a desired electrical performance and capacity of heat dissipation according to a design requirement.
FIG. 1 is a schematic diagram of a conventional electronic package structure. Referring to FIG. 1, the conventional electronic package structure 100 includes a printed circuit board (PCB) 110 and a plurality of electronic elements 120. The electronic elements 120 are disposed on a surface 112 of the PCB 110 and electrically connected to the PCB 110. The PCB 110 has a plurality of pins 116 extending out from another surface 114 of the PCB 110 to be electrically connected to an electronic device, for example, a motherboard (not shown).
FIG. 2 is a schematic diagram of another conventional electronic package structure. Referring to FIG. 2, the conventional electronic package structure 200 includes a circuit substrate 210 and a plurality of electronic elements 220. The electronic elements 220 are disposed on a surface 212 of the circuit substrate 210, and electrically connected to the circuit substrate 210 via a wire bonding technology, a flip-chip bonding technology or a surface mount technology. Moreover, the conventional electronic package structure 200 may be electrically connected to an electronic device, for example, a motherboard (not shown), via a solder paste or a plurality of solder balls (not shown).
It should be noted that the electronic elements 120 of the conventional electronic package structure 100 are all disposed on the surface 112 of the PCB 110, and the electronic elements 220 of the conventional electronic package structure 200 are all disposed on the surface 212 of the circuit substrate 210. Therefore, in the conventional electronic package structures 100 and 200, spatial utilization of the PCB 110 and the circuit substrate 210 is relatively low, and sizes of the conventional electronic package structures 100 and 200 are relatively great.